The present invention relates to a nonaqueous plating method for use in forming a liner for plating before an electrically conductive metal such as copper or the like is embedded by plating in a conductor-embedding fine recess that is defined in a surface of a semiconductor substrate, an interconnection forming method for use in forming an interconnection using such a liner, and apparatus for carrying out such methods.
Generally known plating processes include electroless and electrolytic plating processes which are carried out in an aqueous solution. However, some base materials to be plated are susceptible to water, and those base materials which have a hydrophobic surface or which are not electrically conductive are difficult or impossible to plate.
In view of the above difficulties, there have been developed and put to practical use various nonaqueous plating methods which do not use an aqueous solution. They include an evaporation plating process as a vacuum technology, a vapor-phase plating process based on sputtering or the like, a hot-dip plating process for dipping a workpiece in a molten metal, a thermal spraying process for applying a molten metal to a workpiece, a baking process based on the thermal decomposition of an organic metal, and a process using a mercury amalgam.
Aluminum or aluminum alloy has generally been used as a metal material for forming interconnection circuits on semiconductor substrates. In recent years, however, there has been a noticeable tendency to use copper as such a metal material. The reasons for using copper as an interconnection material are that copper is advantageous about a signal delay phenomenon as its electric resistivity is 1.72 xcexcxcexa9cm that is nearly 40% lower than the electric resistivity of aluminum, the electromigration resistance of copper is much higher than that of presently used aluminum, and it is easier to employ the dual damascene process on copper than on aluminum, resulting in a higher possibility to manufacture complex, fine multilayer interconnection structures relatively inexpensively.
There are available three processes for embedding a metal such as copper simultaneously in interconnection trenches and via holes according to the dual damascene principle, i.e., {circle around (1)} CVD, {circle around (2)} sputter reflow, and {circle around (3)} plating. Of these processes, the plating process allows the metal to be embedded in fine recesses with good embeddability and has a strong tendency to form lines of good conductivity according to a relatively easy, inexpensive process. Therefore, it is becoming the common practice to incorporate the plating process in a semiconductor mass-production line to produce interconnections according to a design rule of at least 0.18 xcexcm.
FIGS. 17A through 17C of the accompanying drawings show a basic process of plating a surface of a semiconductor substrate with copper to fabricate a semiconductor device with a copper interconnection. As shown in FIG. 17A, a semiconductor substrate W includes a semiconductor base 1 with a semiconductor device formed thereon, an electrically conductive layer 1a disposed on the semiconductor base 1, an insulating film 2 of SiO2 deposited on the electrically conductive layer 1a and having a fine recess 5 which comprises a contact hole 3 and an interconnection trench 4 defined therein by lithography and etching, and a barrier layer 6 of TaN or the like deposited on the surface formed so far.
As shown in FIG. 17B, the surface of the semiconductor substrate W is plated with copper to fill copper 7 in the recess 5 in the semiconductor base 1 and deposit copper 7 on the barrier layer 6. Thereafter, the assembly is chemically and mechanically polished (CMP) to remove the copper 7 on the barrier layer 6 and also the barrier layer 6 until the surface of the copper 7 filled in the contact hole 3 and the interconnection trench 4 lies substantially flush with the surface of the insulating film 2. In this manner, an embedded interconnection of the copper 7 is formed as shown in FIG. 17C.
For embedding the copper 7 in the recess 5 defined in the surface of the semiconductor base 1 according to the electrolytic plating process, for example, it is widely practiced to form a liner (undercoat film) 8, which will serve as a seed layer, on the surface of the barrier layer 6 on the semiconductor substrate W before the copper is plated, as shown in FIG. 18A. The liner (seed layer) 8 is deposited for the primary purpose of supplying a sufficient electric current to reduce metal ions in the electrolytic liquid using the surface of the seed layer as an electric cathode, so that the reduced metal ions are precipitated as a metal solid. When the electroless plating process is employed, then it is the wide practice to deposit a catalytic layer in place of a seed layer, as the liner 8.
Presently, the conventional nonaqueous plating methods find limited applications, however, because they need special vacuum equipment, require base materials for plating to be heat-resistant, and are difficult to produce accurate plated films.
Generally, the liner 8 is often formed by sputtering. However, the growth of the liner 8 by sputtering makes it difficult to form the liner 8 that covers the entire surface of the recess 5 as the recess 5 becomes narrower and deeper. For example, if the width W1 of the opening of the recess 5 is 0.25 xcexcm, then it is thought that the limit depth D of the recess 5 for forming a sound liner 8 on the entire surface of the recess 5 according to sputtering film growth is about 1.25 xcexcm.
If the depth of the recess 5 exceeds the limit depth D, then, as shown in FIG. 18A, only an incomplete film is formed on the side walls of the fine recess 5 defined in the surface of the substrate W. Furthermore, when the surface which faces the plasma, while the sputtering process is being carried out, is heated to the limit temperature, sputtering copper molecules are coagulated into precipitated granules 9, which inhibit the formation of a continuous film.
If an attempt is made to embed a metal according to electrolytic plating on the incomplete liner, then the plated metal grows in equal directions at equal rates from sound electrically conductive surfaces of the liner 8, but is restrained or prevented from growing from defective regions of the liner 8. As a result, a void 10 is produced in the copper 7 that is finally embedded in the recess 5, as shown in FIG. 18B, or a large cavity (plating failure) 11 is produced in the copper 7 that is finally embedded in the recess 5, as shown in FIG. 18C.
If the thickness of the liner 8 is increased to a value much greater than the normal thickness to greatly increase the area covered by the liner 8 in order to avoid the above drawbacks, as shown in FIG. 19A, then overhanging regions 12 project to a large extent from shoulders of the opening of the recess 5. When the assembly is plated, the path extending across the entrance of the recess 5 is quickly reduced and closed as the plating process is in progress. As a consequence, copper ions supplied into the recess 5 become unavailable in the plating process, leaving the plating liquid. Therefore, as shown in FIG. 19B, a seam 13 often occurs as a thin slit-like defect in the copper 7 embedded in the recess 5.
The void 10, the cavity 11, and the seam 13, which are plating defects, are extremely harmful to the electrically conductive path. It is thus desirable to eliminate those defects and produce a continuous integral electrically conductive path for achieving a sufficient current capacity, suppressing a signal delay, and improving the electromigration resistance. This also holds true for the electroless plating process which uses a catalytic layer as the liner in place of a seed layer in the electrolytic plating process.
The present invention has been made in view of the above disadvantages and demands. It is an object of the present invention to provide a plating method which can easily be used similarly to an aqueous electroless plating process and is capable of forming a defect-free sound metal plated layer on the surface of a substrate, for example, which has a fine recess or the like for embedding a conductor therein, and an interconnection forming method which is capable of forming an embedded interconnection that comprises a defect-free sound electric conductor in a fine recess.
According to the present invention there is provided a plating method characterized in that a surface of a base material is plated with metal by reducing an organic metal compound in a nonaqueous solvent.
With this method, a solution is prepared by dissolving an organic metal compound containing a metal to be plated in a nonaqueous organic solvent, and the organic metal compound is reduced in the solution to precipitate the metal contained in the organic metal compound on the surface of the base material to plate the base material with the metal.
Also according to the present invention, in the aforementioned plating method, the reduction of the organic metal compound is carried out by a self-reduction decomposing reaction of the organic metal compound with heat.
If the organic metal compound is reduced by being self-decomposed at a low temperature, a solution is prepared by dissolving the organic metal compound in a nonaqueous organic solvent having a boiling point higher than the self-decomposing reduction temperature of the organic metal compound, and the solution is heated to a temperature equal to or higher than the self-decomposing reduction temperature of the organic metal compound in the presence of the base material to be plated for thereby generating a metal film on the surface of the base material.
Also according to the present invention, in the plating method described above, the reduction of the organic metal compound is carried out using a reducing agent.
The reducing agent may comprise an alcohol such as methanol, ethanol, or the like, grape sugar, ascorbic acid, hydrazine, acetaldehyde, or the like.
According to another aspect of the present invention, the base material comprises a substrate with a fine recess, for filling a conductor therein, formed in a surface thereof, and the substrate is plated with metal to form a liner for plating on the surface of the substrate.
The solution with the organic metal compound dissolved in the solvent enters the conductor-embedding fine recess in the surface of the substrate easily and reliably, so that a defect-free and sound liner can be formed on the surface of the substrate including the inner surfaces of the recess.
According to a further aspect of the present invention, there is provided a method of forming an interconnection, comprising electrolytically plating the surface of the substrate after forming the liner by a plating a indicated above and chemical mechanical polishing the surface of the substrate to remove excessive metal attached thereto.
With the above method, interconnections can easily be formed by so-called single- and dual-damascene processes.
According to an yet another aspect of the present invention, there is provided a method of forming an interconnection by filling an electrically conductive metal in a fine recess formed in a surface of a base material with plating, comprising of supplying an ultrafine particle dispersed liquid comprising ultrafine metal particles dispersed in a solvent to the surface of the base material and baking the ultrafine particle dispersed liquid to form a liner, electrolytically plating the surface of the base material, and chemical mechanical polishing the surface of the base material to remove excessive metal attached thereto.
With the above method, by uniformly mixing and dispersing ultrafine metal particles in a solvent, and baking and decomposing all the organic material in the solvent, it is possible to form a good liner for plating which has uniformly covered the entire surface of the base material including side walls of the fine recess.
According to an a still further aspect of the present invention, the ultrafine metal particles have an average diameter ranging from 1 to 20 nm.
It is known that the melting point of a metal particle is lowered as the diameter thereof is reduced. This effect starts to manifest itself when the diameter of the metal particle is 20 nm or less, and becomes distinctive when the diameter of the metal particle is 10 nm or less. Therefore, the average diameter of the ultrafine metal particles are preferably in the range from 1 to 20 nm, and preferably in the range from 1 to 10 nm depending on the shape and dimensions of the fine recesses and the structure of the semiconductor device.
The ultrafine metal particles comprise ultrafine silver particles produced by thermally decomposing an organic complex containing silver. The ultrafine silver particles are fabricated by heating silver stearate in a nitrogen atmospnere at about 250xc2x0 C. for 4 hours, and then refining the same. Ultrafine particles such as manufactured by an in-gas evaporation process may also be used.
The base material desirably comprises a semiconductor substrate, and the electrically conductive metal comprises copper.
According to another aspect of the present invention, there is provided a semiconductor device characterized in that the base material has an interconnection formed by a method as described above.
Also according to the invention, there is provided a plating apparatus comprising a container for holding a solution prepared by uniformly dissolving an organic metal compound having a metal to be plated in a nonaqueous organic solvent and adding a reducing agent, and a substrate holder for holding a substrate and dipping a surface, to be plated, of the substrate in the solution held by the container.
There is also provided a plating apparatus comprising a container for holding a solution prepared by dissolving an organic metal compound having a metal to be plated in a nonaqueous organic solvent having a boiling point higher than the self-decomposing reduction temperature of the organic metal compound, a heating device for heating the solution to a temperature equal to or higher than the self-decomposing reduction temperature of the organic metal compound, and a substrate holder for holding a substrate and dipping a surface, to be plated, of the substrate in the solution held by the container.
Also provided according to the present invention is an apparatus for forming an interconnection, comprising a liner forming device for forming a liner on a surface of a substrate having a fine recess formed therein by reducing an organic metal compound in a nonaqueous solvent, and an electrolytic plating device for electrolytically plating the surface of the substrate using the liner.
An apparatus for forming an interconnection is also provided, comprising a liner forming device for forming a liner on a surface of a substrate having a fine recess formed therein by supplying an ultrafine particle dispersed liquid comprising ultrafine metal particles dispersed in a solvent to the surface of the substrate, and by baking the ultrafine particle dispersed liquid, and an electrolytic plating device for electrolytically plating the surface of the substrate using the liner.
The liner forming device desirably has a dispersed liquid supply device for supplying the ultrafine particle dispersed liquid to the surface of the substrate, and a heat-treating device for heating the substrate to melt and bond the metal.
The liner forming device also desirably further comprises a supplementary drying device for supplementarily drying the solvent in the ultrafine particle dispersed liquid supplied to the surface of the substrate.
With this arrangement, it is possible to completely dry up an organic solvent which cannot be fully dried up by a spin drying process (air drying process) using a spin coater or the like, thus preventing voids from being formed in a heating process.
An apparatus according to the present invention may further comprise a polishing device for chemical mechanical polishing the surface of the substrate to remove excessive metal attached thereto. Also, the respective devices are desirably sequentially arranged in an indoor facility along a direction in which the substrate moves.
The steps of forming a liner of metal, plating the substrate, and chemical mechanical polishing the substrate require different periods of time. It is thus preferable to optimize these steps as a whole according to a feedback management process for feeding back information of those steps with computers. With the devices for performing those steps being housed in one case, the operations of the steps can successively be carried out.
In addition, the respective devices are desirably accommodated individually in respective chambers disposed radially around a central transfer chamber with a transfer robot disposed therein.
Therefore, the steps of forming a liner of metal, plating the substrate, and chemical mechanical polishing the substrate which require different periods of time can be optimized as a whole in an organic fashion and combined, yet performed individually, according to the feedback management process for feeding back information of those steps with the computers.